A phase change memory (PCM) device is a type of non-volatile memory device, which is widely used in electronic appliances due to its numerous advantages such as fast read/write access times, read/write operations in a large number of times, long data retention time, and small unit area. It was once thought that there were no physical limitations for the size reduction of phase change memory cells down to 20 nm process nodes. However, the size reduction is limited by the driving current required to drive the phase change memory device. One way of reducing the size of the phase change memory device is to use a device that can provide a large driving current as a selector for the phase change memory device. In general, bipolar transistors can drive a larger current than CMOS transistors. However, bipolar transistors require a more complex design and increase the size of the chip. Also, integrating bipolar transistors with CMOS transistors result in more complex manufacturing processes.
As it can be seen, a selector (alternatively referred to as a diode) is the bottleneck for the integration with process nodes below 40 nm.
Current phase-change memory devices use diodes as selectors (alternatively referred to as selector switches) that can be controlled down to 6F2 (F is the feature size) with 90 nm process node and capable of providing a driving current of 1.5 mA. This type of phase-change design is expected to be applied to 22 nm process nodes. However, the diode manufacturing process is not compatible with standard CMOS processes, so that the diodes are manufactured in separate processes (for example, EPI) after the manufacture of the CMOS device. In other words, conventional manufacturing processes are very complex, which lower the yield and performance of the device. Furthermore, since the CMOS device is manufactured first, a subsequent ion implantation of the diode processes (e.g., implanting arsenic ions into the substrate) may adversely affect the CMOS device.
Thus, the challenge is to fabricate a diode array using conventional CMOS process techniques that reduce interference between adjacent word lines and bit lines. There exists a need for a method of manufacturing a phase-change memory device having a diode array with low cross-talk noises.